1. Field of the Invention
The present invention relates to the control of photoelectrochemical (PEC) etching by modification of the local electrochemical potential of the semiconductor structure relative to the electrolyte.
2. Description of the Related Art
(Note: This application references to various publications as indicated in the specification by reference numbers enclosed in brackets, e.g., [x]. A list of these publications ordered according to these reference numbers can be found below in the section entitled “References”. Each of these publications is incorporated by reference herein.)
PEC etching uses above-bandgap illumination to generate carriers (specifically holes) needed to etch III-nitrides. The electrochemical potential of the semiconductor material surface relative to the electrolyte causes holes to be drawn toward the semiconductor-electrolyte interface in n-type (unintentionally-doped or doped) material, allowing them to participate in the electrochemical reactions necessary for material removal. Because the etching mechanism relies heavily on the absorption of incident light and the electrochemical potential of the semiconductor material relative to the electrolyte, PEC etching can be defect-selective, dopant-selective, and bandgap-selective.
Most applications of PEC etching have pertained to vertical etching of the material, either through direct illumination of the material surface, or by illumination through a masking layer. Reports also exist of lateral PEC etching. However, specific descriptions of local control of the etch process through modifications of the electrochemical component of etching have not been presented. Previously published and patented techniques that apply to III-nitride PEC etching [1-10] suffer from certain limitations, which may be encountered individually or simultaneously depending on the particular application considered, as will be discussed below.
In PEC etching of semiconductor multilayer structures, variability can arise from (a) non-uniform illumination of the sample (e.g. via absorption of the incident light), (b) geometry-dependent limitations to the availability of electrolyte (as would characterize the wetting of electrolyte between two very closely spaced layers of material), and (c) carrier diffusion and recombination dynamics that vary strongly with geometry and position of the carriers within a structure. While limitations (a) and (b) are important, we believe that relatively easier solutions of (a) altering illumination directions and conditions and (b) changing electrolyte concentration and flow conditions are more easily implemented. Our invention addresses the last limitation—through strategic tailoring of the local electrochemical potential of the material to be etched.
As will be described in detail in the preferred embodiment, the placement of suitable layers within the semiconductor structure may be used to prevent etching of specific layers. Additionally, the placement of a cathode in contact with a particular layer (or layers) of a semiconductor structure may be used to promote etching of a specific layer (or layers) when desired. A combination of these two approaches may be used, as required for certain applications.
Specifically, prior to this invention, there existed no effective method for fabricating the following semiconductor structures:
1) High-quality nitride-based microdisk resonators, and
2) High-quality vertically oriented nitride-based air-gap distributed Bragg reflector (DBR) structures.
This invention also allows for significant improvements over existing practices in the following nitride-based applications:
1) Electrical and optical apertures in nitride-based electronic and optoelectronic devices: Currently used methods typically employ some form of ion implantation, which may cause unwanted damage to critical layers [11]; or dry etching followed by regrowth, which is an elaborate and cumbersome process [12]. In recent years, PEC etching has been used to create current apertures in electrical devices [1]; however, due to the lack of etch control, the material composition of the undercut layers is highly restricted. Thus, possible device designs for these geometries are limited.
2) Substrate removal and cavity thinning: Currently, the commonly used methods include laser-assisted debonding [13, 14] and inductively coupled plasma (ICP) etching [15-17] or polishing, respectively. These methods are cumbersome, and typically result in relatively imprecise material thicknesses.
3) Semiconductor membranes and cantilevers: Currently, PEC etching is used to create undercut structures such as membranes and cantilevers in the nitride material system [3, 5, 7, 18]; however, due to the lack of etch control, the material composition of the undercut layers is highly restricted [18]. Therefore, possible designs for undercut devices such as micro-electro-mechanical systems (MEMS) and photonic crystals are extremely limited.